Montecito, the first dual-core processor based on Intel's Itanium 2 architecture, will not begin shipping in volume until 2006, company executives revealed during a conference call with press Monday.
Intel had said that this follow-up to its current generation of Itanium 2 processors, code-named Madison, would ship in 2005, but the chip maker had not previously given specific details on when Montecito was expected to be generally available from server manufacturers.
That date will come in the "early part of 2006," said Abhi Talwalkar, vice president and general manager of Intel's Enterprise Platforms Group. Original equipment manufacturers (OEMs) will begin delivering Montecito systems for "end user trials" beginning by the fourth quarter of 2005, he said.
Intel demonstrated an early implementation of the processor, which will use a new 90-nanometer manufacturing process technology, at its Intel Developer Forum in San Francisco in September. The company has now begun the long and arduous process of testing and refining production of the chip, Talwalkar said. "We're making great progress here on the silicon itself; in fact we've sampled CPUs to OEMs who are into system-level testing as we speak," he said.
The news that Montecito systems will not ship in volume for more than a year means that its multicore successor, code-named Tukwila, will likely not arrive until 2007, said Kevin Krewell, editor in chief of Microprocessor Report. "It's a slight disappointment," he said. "I think a lot of people thought there would be systems available in 2005."
Intel has declined to say when it expects to ship Tukwila.
Still, the transition to Montecito, which will have 24M bytes of Level 3 (L3) cache, will be a major technology update for Intel, and the company is generally making "good progress" in bringing it to market, Krewell said. "When you deal with a chip that has 1.7 billion transistors, two cores, and that much cache, it's going to require a bit of testing," he said. "It's a huge increase in compute density."
Intel has also been about a quarter behind analyst expectations with an update of its single-core Itanium 2 processor, Krewell said.
The new versions of the single-core chips, which were formally announced Monday, will come in six new configurations, including a 1.6GHz processor with 9M bytes of L3 cache. They will also include a 1.6GHz chip with 6M bytes of cache, a 1.5GHz chip with 4M bytes of cache, and new processors for dual-processor and low-voltage systems.
Engineers at the NASA (National Aeronautics and Space Administration) Ames Research Center have already been using the new 9M-byte cache processor, which they say has given them a 30 percent to 40 percent improvement over previous Itanium 2 chips in the scientific applications they are running. This chip should also deliver a 15 percent boost for users who are doing database transaction processing, Talwalkar said.
"It's slightly faster from a frequency point of view and it's got slightly more cache than the other part," Krewell said of the 9M-byte chip. "It's not nearly as radical as when we get to Montecito. That's where we get a much more significant jump in processing performance."
The updated chips will be included in Hewlett-Packard's Integrity rx1620, rx2620 and rx4640 servers by December and in IBM Corp.'s eServer xSeries 455 within the month, the vendors said. They will be integrated into HP's midrange and Superdome systems early next year, HP said.
The new processors are available immediately in Unisys Corp.'s ES7000 server, the company said in a statement.
In 1,000-unit quantities, the 9M-byte Itanium 2 processor is priced at US$4,226 per processor, Intel said. In that quantity, the 6M-byte chip is priced at US$1,980 and the 4M-byte at $910.
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